DocumentCode
1429426
Title
Low-power semiconductor memory cell
Author
Kinniment, D.J.
Author_Institution
University of Manchester, Computer Science Department, Manchester, UK
Volume
120
Issue
10
fYear
1973
fDate
10/1/1973 12:00:00 AM
Firstpage
1212
Lastpage
1215
Abstract
Because of its low power dissipation and small area, the dynamic semiconductor random-access memory cell is currently becoming widely used in computer main-memory applications. This paper describes an alternative bipolar memory cell which uses the small area and high yield obtainable with the collector-diffusion isolation process, without the disadvantages of the refresh requirement of dynamic memories. A ratio of 15:1 in power dissipation between the selected and the unselected state allows a large number of storage cells on a single silicon chip, while retaining a relatively fast cycle time.
Keywords
large scale integration; random-access storage; semiconductor storage devices; bipolar memory cell; low power dissipation; semiconductor;
fLanguage
English
Journal_Title
Electrical Engineers, Proceedings of the Institution of
Publisher
iet
ISSN
0020-3270
Type
jour
DOI
10.1049/piee.1973.0246
Filename
5250932
Link To Document