DocumentCode :
1430204
Title :
Self-blocking flip-flop design
Author :
Li, Xin ; Jia, Shenli ; Liang, Xianling ; Wang, Yannan
Author_Institution :
Dept. of Microelectron., Peking Univ., Beijing, China
Volume :
48
Issue :
2
fYear :
2012
Firstpage :
82
Lastpage :
83
Abstract :
A new edge triggered flip-flop design is presented. A self-blocking mechanism is introduced. The new scheme features a single phase clock, a small clock load and a simple structure. Simulation results show that it outperforms the sense amplifier based flip-flop in speed improvement and power saving.
Keywords :
clocks; flip-flops; logic design; edge triggered flip-flop design; power saving; self-blocking flip-flop design; single phase clock; speed improvement;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2011.2888
Filename :
6138356
Link To Document :
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