Title :
Self-blocking flip-flop design
Author :
Li, Xin ; Jia, Shenli ; Liang, Xianling ; Wang, Yannan
Author_Institution :
Dept. of Microelectron., Peking Univ., Beijing, China
Abstract :
A new edge triggered flip-flop design is presented. A self-blocking mechanism is introduced. The new scheme features a single phase clock, a small clock load and a simple structure. Simulation results show that it outperforms the sense amplifier based flip-flop in speed improvement and power saving.
Keywords :
clocks; flip-flops; logic design; edge triggered flip-flop design; power saving; self-blocking flip-flop design; single phase clock; speed improvement;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2011.2888
