A 14-Gops programmable motion estimator for H.26X video coding

Author

Lin, Horng-Dar ; Anesko, Alex ; Petryna, Brian

Author_Institution

Holontech Corp., San Jose, CA, USA

Volume

31

Issue

11

fYear

1996

fDate

11/1/1996 12:00:00 AM

Firstpage

1742

Lastpage

1750

Abstract

A 14 Giga operations per second (Gops) programmable motion estimator chip is developed to support multiple algorithms and video coding standards. The chip performs multisurvivor motion estimation in the subsampled scan and the cluster search mode. The chip uses a dual-addressing single-port memory and a pel-rotating processing element array to implement synchronous self-aligned block difference computation. The chip is implemented in 0.5-μm CMOS achieving 86.4 Million operations per second (Mops)/KXtr and 21 mW/Gop. The chip delivers full search quality for H.26X coding at CIF 30 f/s, near full search quality at NTSC level, and a wide range of other video quality and resolution tradeoffs

Keywords

CMOS digital integrated circuits; digital signal processing chips; motion estimation; video coding; 0.5 micron; CMOS chip; H.26X video coding; NTSC level; cluster search mode; dual-addressing single-port memory; multiple algorithms; multisurvivor motion estimation; pel-rotating processing element array; programmable motion estimator; subsampled scan mode; synchronous self-aligned block difference computation; video coding standards; Algorithm design and analysis; Clustering algorithms; Computer architecture; Hardware; Motion control; Motion estimation; Registers; Search engines; Senior members; Standards development; Video codecs; Video coding;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.1996.542319

Filename

542319