Title :
A video signal processor for motion-compensated field-rate upconversion in consumer television
Author :
Lippens, Paul ; De Loore, Bart ; De Haan, Gerard ; Eeckhout, Piet ; Huijgen, Henk ; Loning, Angelica ; Mcsweeney, Brian ; Verstraeien, M. ; Pahn, B. ; Kettenis, J.
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
fDate :
11/1/1996 12:00:00 AM
Abstract :
An IC for 100-Hz television has been realized implementing motion estimation and compensation algorithms for high-quality upconversion and a judder-free motion portrayal of movie material. The four embedded video signal processors on this IC provide a processing power of 10 giga-operation per second (GOPS). Their architecture was generated from an algorithm description using behavioral synthesis. The required 25-Gb/s memory bandwidth was realized by embedding 24 single/dual port SRAM/DRAM instances. The test approach includes full scan, boundary scan, functional testing, built-in-self-test, and IDDq-test. The so-called “Natural Motion” feature implemented by this IC was demonstrated at the IFA´95 and received the European Video Innovation Award 95-96
Keywords :
consumer electronics; digital signal processing chips; motion compensation; motion estimation; television equipment; video signal processing; 100 Hz; IC; IDDq-test; Natural Motion; algorithm; architecture; behavioral synthesis; boundary scan testing; built-in-self-test; consumer television; field-rate upconversion; full scan testing; functional testing; memory bandwidth; motion compensation; motion estimation; movie material; single/dual port SRAM/DRAM instances; video signal processor; Bandwidth; Motion estimation; Motion pictures; Random access memory; Signal processing; Signal processing algorithms; Signal synthesis; TV; Technological innovation; Testing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1996.542321
