• DocumentCode
    1430662
  • Title

    Simple mathematical model of shift of threshold voltage induced in an m.o.s. transistor by testing at elevated temperatures

  • Author

    Reynolds, F.H.

  • Author_Institution
    General Post Office, Research Department, London, UK
  • Volume
    119
  • Issue
    12
  • fYear
    1972
  • fDate
    12/1/1972 12:00:00 AM
  • Firstpage
    1683
  • Lastpage
    1686
  • Abstract
    Tests of a simple m.o.s. integrated circuit at elevated temperatures have previously exposed substantial negative shifts of threshold voltage in those transistors operated at a negative gate voltage. Some of the results presented in an earlier paper are now reprocessed to yield a simple mathematical model of the shift observed on one of the transistors. The model provides an improved basis for the prediction of long-term trends under the stresses of normal service life.
  • Keywords
    field effect transistors; semiconductor device models; MOS devices; field effect transistors; integrated circuit testing; semiconductor device testing; shift; threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Electrical Engineers, Proceedings of the Institution of
  • Publisher
    iet
  • ISSN
    0020-3270
  • Type

    jour

  • DOI
    10.1049/piee.1972.0335
  • Filename
    5251154