DocumentCode :
1431195
Title :
Optimal parameters for ΔΣ modulator topologies
Author :
Marques, Augusto ; Peluso, Vincenzo ; Steyaert, Michel S. ; Sansen, Willy M.
Author_Institution :
ESAT, Katholieke Univ., Leuven, Belgium
Volume :
45
Issue :
9
fYear :
1998
fDate :
9/1/1998 12:00:00 AM
Firstpage :
1232
Lastpage :
1241
Abstract :
A systematic study of single-loop, cascaded, and multibit ΔΣ modulators of second to fourth order is presented, based on a combination of behavioral simulations and linear modeling. Constraints for optimal performance and precise guidelines for the choice of parameters are derived. Moreover, the optimal parameters and the corresponding performance are found and given in tables. A graph showing the maximal achievable performance of each topology as a function of the oversampling ratio is presented, offering a valuable help for the design of analog-to-digital converters
Keywords :
circuit optimisation; network parameters; network topology; sigma-delta modulation; ΔΣ modulator; analog-to-digital converter; behavioral simulation; cascaded topology; design; linear model; multibit topology; optimal parameters; oversampling ratio; single-loop topology; Analog-digital conversion; Circuit noise; Circuit topology; Degradation; Delta modulation; Guidelines; Noise shaping; Quantization; Stability; System performance;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.718590
Filename :
718590
Link To Document :
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