DocumentCode :
143218
Title :
Hardware implementation of the Smith-Waterman algorithm using a systolic architecture
Author :
Marmolejo-Tejada, J.M. ; Trujillo-Olaya, V. ; Renteria-Mejia, C.P. ; Velasco-Medina, J.
Author_Institution :
Bionanoelectronics Group, Univ. del Valle, Cali, Colombia
fYear :
2014
fDate :
25-28 Feb. 2014
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents the design of a systolic processor for DNA local pairwise alignment. The main building block of the processor is a 1D array of processing elements that allows pipeline processing to reduce the execution time with respect to software tools. We aligned two sequences of 4096 nucleotides from the ABO blood group gene of human and house mouse using ModelSim-Altera to verify the hardware design. The hardware simulation results were compared with software simulation results, showing the functionality of the design. The design can only be synthesized on the targeted FPGA for processing 256 nucleotides simultaneously due to hardware limitations (ALUTs and registers), but could be implemented for aligning larger sequences by using a bigger device or FPGA arrays. The design could also be used to implement other dynamic programming algorithms by modifying the processing element.
Keywords :
DNA; bioinformatics; dynamic programming; field programmable gate arrays; pipeline processing; systolic arrays; 1D array; ABO blood group gene; ALUT; DNA local pairwise alignment; FPGA arrays; ModelSim-Altera; Smith-Waterman algorithm; dynamic programming algorithms; execution time reduction; hardware design; hardware implementation; hardware simulation; nucleotides; pipeline processing; processing elements; registers; software tools; systolic architecture; systolic processor design; Algorithm design and analysis; Arrays; Field programmable gate arrays; Hardware; Heuristic algorithms; Software; Smith-Waterman algorithm; dynamic programming; hardware architecture; sequence alignment; systolic array;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (LASCAS), 2014 IEEE 5th Latin American Symposium on
Conference_Location :
Santiago
Print_ISBN :
978-1-4799-2506-3
Type :
conf
DOI :
10.1109/LASCAS.2014.6820284
Filename :
6820284
Link To Document :
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