DocumentCode
1432295
Title
Ultrathin nitride/oxide (N/O) gate dielectrics for p/sup +/-polysilicon gated PMOSFETs prepared by a combined remote plasma enhanced CVD/thermal oxidation process
Author
Wu, Yider ; Lucovsky, Gerald
Author_Institution
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Volume
19
Issue
10
fYear
1998
Firstpage
367
Lastpage
369
Abstract
Ultrathin nitride-oxide (N/O/spl sim/1.5/2.6 nm) dual layer gate dielectrics have been incorporated into PMOSFETs with boron-implanted polysilicon gates. Boron penetration is effectively suppressed by the top plasma-deposited nitride layer leading to improved short channel performance as compared to PMOSFETs with oxide dielectrics. In addition, improved interface characteristics and hot carrier degradation immunity are also demonstrated for the devices with the N/O dual layer gate dielectrics.
Keywords
MOSFET; dielectric thin films; hot carriers; oxidation; plasma CVD coatings; PMOSFET; Si:B; boron implanted p/sup +/-polysilicon gate; hot carrier degradation; remote plasma enhanced CVD; thermal oxidation; ultrathin nitride-oxide dual layer gate dielectric; Annealing; Boron; CMOS technology; Dielectric devices; MOSFET circuits; Nitrogen; Oxidation; Plasma devices; Plasma properties; Silicon;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.720188
Filename
720188
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