DocumentCode :
1434674
Title :
Platform tuning for embedded systems design
Author :
Vahid, F. ; Givargis, T.
Author_Institution :
Dept. of Comput. Sci. & Eng., California Univ., Riverside, CA
Volume :
34
Issue :
2
fYear :
2001
fDate :
2/1/2001 12:00:00 AM
Firstpage :
112
Lastpage :
114
Abstract :
Parameterized SOC platforms solve numerous problems that face system designers. With platforms ranging from IP to IC variants and tuning tasks ranging from simple parameter configuration to aggressive architectural transformations, platform tuning issues can be daunting. UCR´s Dalton Project shows that platform tuning can increase performance and reduce power consumption for system-on-chip embedded platforms
Keywords :
embedded systems; low-power electronics; microprocessor chips; UCR Dalton Project; embedded systems design; parameterized SOC platforms; platform tuning; power consumption; system-on-chip embedded platforms;
fLanguage :
English
Journal_Title :
Computer
Publisher :
ieee
ISSN :
0018-9162
Type :
jour
DOI :
10.1109/2.901171
Filename :
901171
Link To Document :
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