Title :
Adaptive gain push-pull shunt regulation in digital circuits
Author :
Jeong, H.S. ; Kim, L.S.
Author_Institution :
Memory Div., Samsung Electron., Hwasung, South Korea
fDate :
1/1/2011 12:00:00 AM
Abstract :
Integrated regulation can reduce the effective supply impedance of digital circuits to meet the required supply noise margin with high efficiency. This can be achieved with a push-pull regulator topology in which the gain of regulation is controlled by digitally turning on sub push-pull blocks. The measured results from a 0.18 um CMOS test-chip verify that the proposed scheme reduces supply noise by 25 for 10 noise budget and 43 for 5 noise margin.
Keywords :
CMOS integrated circuits; amplifiers; comparators (circuits); integrated circuit noise; power supply circuits; CMOS test chip; adaptive gain push-pull shunt regulation; digital circuits; push-pull regulator topology; size 0.18 mum; supply noise margin;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2010.7518