• DocumentCode
    1435101
  • Title

    Photonic Transitions (1.4 eV–2.8 eV) in Silicon p ^{+} np ^{+} Injection-Avalanche CMOS LED

  • Author

    Snyman, Lukas Willem ; Du Plessis, Monuko ; Bellotti, Enrico

  • Author_Institution
    Dept. of Electr. Eng., Tshwane Univ. of Technol. (TUT), Pretoria, South Africa
  • Volume
    46
  • Issue
    6
  • fYear
    2010
  • fDate
    6/1/2010 12:00:00 AM
  • Firstpage
    906
  • Lastpage
    919
  • Abstract
    p+np+ CMOS Si LED structures were modeled in order to investigate the effect of various depletion layer profiles and defect engineering on the photonic transitions in the 1.4-2.8 eV, 450-750 nm regime. Modeling shows that by utilizing a short linear increasing E-field in the p+n reverse-biased junction with a gradient of approximately 5 × 105 V cm-1· ¿m-1, and injecting carriers from an adjacent p+n junction, increased localized optical yield by a factor 50-100. A number of device designs were realized using CMOS 0.35 ¿m technology. The device design involves normal CMOS design and processing procedures with no excessive microdimensioning. The current devices operated in the 6-8 V, 1 ¿A-2 mA regime, and yield emission intensities of up to 100 nW ¿m-2. The current emission levels are about three orders higher than the low-frequency detectability limit of Si CMOS p-n detectors of corresponding area, which make diverse electro-optical applications such as MOEMS devices, and diverse optical signal processing and wave-guiding and the development of ¿smart chips¿ feasible in standard CMOS integrated circuitry.
  • Keywords
    CMOS integrated circuits; avalanche photodiodes; light emitting diodes; micro-optomechanical devices; optical signal detection; silicon; MOEMS devices; Si; Si CMOS p-n detectors; avalanche CMOS LED; defect engineering; depletion layer profiling; electron volt energy 1.4 eV to 2.8 eV; optical signal processing; p+n reverse-biased junction; photonic transitions; silicon p+np+ injection structures; size 0.35 mum; smart chips; wavelength 450 nm to 750 nm; yield emission intensity; CMOS process; CMOS technology; Electrooptic devices; Light emitting diodes; Optical signal processing; Process design; Semiconductor device modeling; Silicon; Standards development; Stimulated emission; CMOS integrated circuitry; electroluminescence; light-emitting diodes (LEDs); physical modeling; silicon; silicon photonics;
  • fLanguage
    English
  • Journal_Title
    Quantum Electronics, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9197
  • Type

    jour

  • DOI
    10.1109/JQE.2009.2036746
  • Filename
    5427253