• DocumentCode
    1435435
  • Title

    Beating the heat [CMOS hot-carrier reliability]

  • Author

    Sugiharto, Dewi S. ; Yang, Cary Y. ; Le, Huy ; Chung, James E.

  • Author_Institution
    Microelectron. Lab., Santa Clara Univ., CA, USA
  • Volume
    14
  • Issue
    5
  • fYear
    1998
  • fDate
    9/1/1998 12:00:00 AM
  • Firstpage
    43
  • Lastpage
    51
  • Abstract
    CMOS hot-carrier reliability at both transistor and circuit levels has been examined. Accurate reliability assessment requires defining suitable criteria for acceptable performance for both circuit and individual transistors. As device designers meet demands for greater speed and more complex circuitry accompanied by shrinking the size of transistor into the deep-submicron regime, they have to contend with increase in current densities and higher electric fields. Though in general a MOSFET´s driving capability increases as the channel length decreases, the resulting high field will eventually limit the driving capability of the device. The authors discuss improving CMOS hot-carrier reliability through analysis, modelling and simulation
  • Keywords
    CMOS integrated circuits; MOSFET; hot carriers; integrated circuit modelling; integrated circuit reliability; semiconductor device models; semiconductor device reliability; CMOS IC reliability; CMOSFET reliability; MOS degradation models; deep-submicron regime; high field; hot carrier injection mechanisms; hot-carrier reliability; modelling; reliability simulation; Circuit simulation; Degradation; Drain avalanche hot carrier injection; Electron traps; Hot carrier injection; Hot carriers; Impact ionization; MOSFET circuits; Substrate hot electron injection; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Circuits and Devices Magazine, IEEE
  • Publisher
    ieee
  • ISSN
    8755-3996
  • Type

    jour

  • DOI
    10.1109/101.721519
  • Filename
    721519