Towards to SHA-3 Hashing Standard for Secure Communications: On the Hardware Evaluation Development

Author

Sklavos, N.

Volume

10

Issue

1

fYear

2012

Firstpage

1433

Lastpage

1434

Abstract

The most well-known and officially used hash function is the Secure Hash Algorithm-1 (SHA-1) and Secure Hash Algorithm-2 (SHA-2). In recent years serious attacks have been published against SHA-1. This led the National Institute of Standard and Technology (NIST) to organize an effort to develop a modern and more secure hash algorithms through a hash function competition for usage in the following years in the near future. The selected new hash function will be called SHA-3. This keynote talk deals with the hardware implementation efficiency of SHA-3 candidates, which is one of the most critical issues, regarding the adoption of the SHA-3 standard. Comparisons, in terms of hardware terms are given in detail, throughout this talk.

Keywords

IEC standards; ISO standards; cryptographic protocols; field programmable gate arrays; FPGA family; ISO-IEC 10118-3 standard; International Organization for Standardization 10118-3 standard; MAC; NIST; National Institute of Standard and Technology; RAM requirements; SHA-1 standard; SHA-2 standard; SHA-3 hashing standard; Whirlpool hash function; client authentication; collision resistance; cryptographic community; cryptographic protocols; cryptographic secured hash functions; digital signatures; first preimage resistance; first-round candidates; hardware evaluation development; hardware implementations; keynote talk; message-authentication code; second preimage resistance; second-round candidates; secure communications; secure hash algorithm-1 standard; secure hash algorithm-2 standard; smart cards; software implementations; standard-cell ASIC implementations; word length 224 bit; word length 256 bit; word length 264 bit; word length 384 bit; word length 512 bit; Algorithm design and analysis; Cryptography; Field programmable gate arrays; Hardware; NIST; Software algorithms; Cryptographic Hardware; Embedded Systems; FPGA; SHA-3; System On Chip Design;

fLanguage

English

Journal_Title

Latin America Transactions, IEEE (Revista IEEE America Latina)

Publisher

ieee

ISSN

1548-0992

Type

jour

DOI

10.1109/TLA.2012.6142498

Filename

6142498