Title :
Design of a configurable accelerator for moment computation
Author :
Hung, Donald L. ; Cheng, H.D. ; Sengkhamyong, Savang
Author_Institution :
Dept. of Comput., Inf. & Syst. Eng., San Jose State Univ., CA, USA
Abstract :
The method of moments is one of the most powerful techniques for image analysis. However, real-time applications of this method have been prohibited due to the computational intensity in calculating the moments. This paper presents a novel configurable hardware accelerator for expediting the moment computation. The fundamental building block of the proposed accelerator is a custom-designed floating-point moment processing element (MPE). Running at 75 MHz, the MPE can provide a 12X speedup over a 166 MHz TMS320C6701 digital signal processor. On top of this, a linear performance boost can be obtained by connecting up to eight MPEs into a one-dimensional (1-D) array.
Keywords :
digital signal processing chips; image processing; method of moments; reconfigurable architectures; 75 MHz; configurable hardware accelerator; custom design; digital signal processor; floating-point moment processing element; image analysis; method of moments; one-dimensional array; real-time computation; Acceleration; Computer applications; Computer architecture; Computer science; Hardware; Image color analysis; Image edge detection; Moment methods; Parallel processing; Very large scale integration;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
