• DocumentCode
    1437336
  • Title

    p-channel LDMOS transistor using new tapered field oxidation technology

  • Author

    Kim, Jung-Ho ; Kim, J. ; Koo, J.G. ; Kim, D.Y.

  • Author_Institution
    Micro-Electron. Lab. Technol., Electron. & Telecommun. Res. Inst., Taejeon, South Korea
  • Volume
    34
  • Issue
    19
  • fYear
    1998
  • fDate
    9/17/1998 12:00:00 AM
  • Firstpage
    1893
  • Lastpage
    1894
  • Abstract
    The on-resistance of p-channel RESURF (reduced surface field) LDMOS (lateral double-diffused MOS) transistors has been improved by using a new tapered TEOS field oxide in the drift region of the devices. With similar breakdown voltage, at Vgs=-5.0 V, the specific on-resistance of the LDMOS with tapered field oxide is ~31.5 mΩ·cm2, while that of the LDMOS with conventional field oxide is ~57 mΩ·cm2
  • Keywords
    electric breakdown; integrated circuit technology; oxidation; power MOSFET; power integrated circuits; silicon-on-insulator; -5 V; MOS transistors; RESURF type; SOI LDMOS device; breakdown voltage; drift region; lateral double-diffused MOSFET; p-channel LDMOS transistor; reduced surface field; tapered TEOS field oxide; tapered field oxidation technology;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19981303
  • Filename
    722415
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1437336