DocumentCode
1438097
Title
Process-parameter variability in the manufacture of m.o.s. integrated circuits
Author
Reynolds, F.H. ; Stevens, J.W.
Author_Institution
General Post Office, Research Centre, Ipswich, UK
Volume
124
Issue
6
fYear
1977
fDate
6/1/1977 12:00:00 AM
Firstpage
505
Lastpage
507
Abstract
The integrated circuits produced on a manufacturer´s process line incorporate a standardised m.o.s. transistor providing a set of seven process-parameter values per die at the wafer-probe stage. A statistical analysis of the parameters measured on batches of wafers withdrawn in consecutive weeks from the line shows that the batches received different process treatments. A similar analytical procedure applied to the individual wafers of the batches yields the more surprising result that the wafers were also dissimilarly processed.
Keywords
field effect integrated circuits; integrated circuit manufacture; statistical analysis; MOS IC; manufacture; process parameter variability; statistical analysis; wafer probe stage;
fLanguage
English
Journal_Title
Electrical Engineers, Proceedings of the Institution of
Publisher
iet
ISSN
0020-3270
Type
jour
DOI
10.1049/piee.1977.0099
Filename
5252705
Link To Document