Gate oxide integrity on ITOX-SIMOX substrates and influence of test device geometry on characterization

Author

Kawamura, Keisuke ; Deai, Hiroyuki ; Sakamoto, Hikaru ; Yano, Takayuki ; Hamaguchi, Isao ; Takayama, Seiji ; Nagatake, Yoichi ; Tachimori, Masaharu ; Matsumura, Atsuki

Author_Institution

Adv. Technol. Res. Labs., Nippon Steel Corp., Yamaguchi, Japan

Volume

48

Issue

2

fYear

2001

fDate

2/1/2001 12:00:00 AM

Firstpage

307

Lastpage

315

Abstract

The integrity of gate oxides on low-dose separation by implanted oxygen (SIMOX) substrates fabricated by the internal-thermal-oxidation (ITOX) process, so-called ITOX-SIMOX substrates, was evaluated, and the influence of test device geometry on the characterization was investigated. Characterization of time-dependent dielectric breakdown (TDDB) was performed for a gate oxide of 8.6-nm thick using lateral test devices. Experimental results show considerable influence of gate electrode geometry on the gate oxide integrity (GOI) characteristics. This can be explained by a model that includes a lateral parasitic resistance in the superficial Si layer beneath the gate electrode. Based on analysis using this model, a test device with a small gate array was proposed to reduce the influence of lateral parasitic resistance, and the advantage of the device was verified

Keywords

SIMOX; electric breakdown; oxidation; substrates; ITOX-SIMOX substrate; gate oxide integrity; internal thermal oxidation; lateral parasitic resistance; test device; time-dependent dielectric breakdown; Bonding; CMOS technology; Dielectric breakdown; Dielectric substrates; Electrodes; Geometry; Oxidation; Performance evaluation; Silicon on insulator technology; Testing;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.902732

Filename

902732