Distributed B-spline electrothermal models of thyristors proposed for circuit simulation of power electronics

A B-spline based electrothermal model for thyristors is proposed for circuit simulations and is demonstrated for gate-triggered resistive circuits by comparison with PISCES simulation results. The model topology for small area thyristors consists of an electrical device circuit model and a thermal circuit model which are coupled together to establish the interaction between the electrical and thermal responses. A distributed topology is introduced for large area thyristors to simulate the realistic electrothermal spreading effect. Each element of the electrothermal topology is extracted from the DC current-voltage (I-V), quasistatic capacitance-voltage (C-V), and static and transient thermal characteristics simulated with PISCES. The fitting technique relies on B-spline and Tensor Product B-Spline (TPS) numerical methods, as well as, physical-based analytic expressions. This B-spline based electrothermal model is implemented in the SPICE-compatible MISIM circuit simulator. Simulations are performed to obtain the device electrothermal distribution, verify the model accuracy, and demonstrate the device self heating effect for 600 Hz gate-triggered resistive circuits. Excellent agreements are obtained for the DC I-V, transient AC, and electrothermal simulation results between the new circuit model and the PISCES/GIGA simulator for the low-frequency applications considered