The fabrication and characterization of EEPROM arrays on glass using a low-temperature poly-Si TFT process

Author

Young, N.D. ; Harkin, G. ; Bunn, R.M. ; McCulloch, D J ; French, I.D.

Author_Institution

Philips Res. Lab., Redhill, UK

Volume

43

Issue

11

fYear

1996

fDate

11/1/1996 12:00:00 AM

Firstpage

1930

Lastpage

1936

Abstract

The fabrication and optimization of poly-Si thin-film transistors and memory devices on glass substrates at temperatures of 200°C-400°C is described, and the device characteristics and stability are discussed. The devices were formed using PECVD amorphous silicon, silicon dioxide, and silicon nitride films, and the crystallization of the amorphous silicon was achieved with an excimer laser. The performance of 16×16 EEPROM arrays with integrated drive circuits formed using this technology is presented

Keywords

EPROM; MOS memory circuits; cellular arrays; chemical vapour deposition; circuit optimisation; driver circuits; integrated circuit measurement; integrated circuit metallisation; integrated circuit technology; laser beam annealing; silicon; silicon compounds; thin film transistors; 200 to 400 degC; Al-SiN-SiO₂-Si; EEPROM arrays; device characteristics; excimer laser; glass substrates; integrated drive circuits; laser crystallization; low-temperature polysilicon TFT process; Amorphous silicon; Circuit stability; EPROM; Fabrication; Glass; Semiconductor films; Silicon compounds; Substrates; Temperature; Thin film transistors;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.543029

Filename

543029