DocumentCode
1439735
Title
Phase-Change Technology and the Future of Main Memory
Author
Lee, Benjamin C. ; Zhou, Ping ; Yang, Jun ; Zhang, Youtao ; Zhao, Bo ; Ipek, Engin ; Mutlu, Onur ; Burger, Doug
Author_Institution
Electr. Eng., Stanford Univ., Stanford, CA, USA
Volume
30
Issue
1
fYear
2010
Firstpage
143
Lastpage
143
Abstract
Phase-change may enable continued scaling of main memories, but PCM has higher access latencies, incurs higher power costs, and wears out more quickly than DRAM. This article discusses how to mitigate these limitations through buffer sizing, row caching, write reduction, and wear leveling, to make PCM a viable dream alternative for scalable main memories.
Keywords
DRAM chips; cache storage; phase change memories; DRAM; PCM; buffer sizing; main memory; phase change technology; power cost; row caching; wear leveling; write reduction; Costs; Delay; Flash memory; Material storage; Nonvolatile memory; Phase change materials; Phase change memory; Prototypes; Random access memory; Space technology; DRAM; PCM; energy efficiency; memory architecture; phase-change memory; technology scaling;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.2010.24
Filename
5430747
Link To Document