DocumentCode :
1440198
Title :
An EPR4 read/write channel with digital timing recovery
Author :
Vishakhadatta, G. Diwakar ; Croman, Russell ; Goldenber, M. ; Hein, Jerrell P. ; Katikaneni, Pradeep ; Kuai, Diana ; Lee, Cathy ; Tesu, Ion C. ; Trujillo, Richard ; Ligang Zhan ; Anderson, Kent ; Behrens, Richard ; Bliss, William ; Du, Li ; Dudley, Trent
Author_Institution :
Cirrus Logic, Austin, TX, USA
Volume :
33
Issue :
11
fYear :
1998
fDate :
11/1/1998 12:00:00 AM
Firstpage :
1851
Lastpage :
1857
Abstract :
This paper presents a device that uses digital interpolation of asynchronously sampled data to perform timing recovery. Analog-to-digital conversion (ADC) and finite impulse response filter (FIR) latency do not contribute to loop delay, moving most of the pulse equalization to the digital FIR. By eliminating the variable frequency oscillator, crosstalk is eliminated. Very low oversampling rates are shown to be sufficient, enabling data recovery at a low rate loss. Calibration modes for low-pass filter tuning and the flash ADC are used to improve performance of the analog channel. The 0.35-μm CMOS device is specified for data rates up to 245 Mbps
Keywords :
CMOS integrated circuits; FIR filters; analogue-digital conversion; calibration; digital filters; interpolation; low-pass filters; magnetic disc storage; timing; 0.35 micron; 245 Mbit/s; CMOS device; EPR4 read/write channel; analog-to-digital conversion; asynchronously sampled data; calibration modes; digital FIR; digital interpolation; digital timing recovery; finite impulse response filter latency; flash ADC; low-pass filter tuning; magnetic disk drives; oversampling rates; pulse equalization; Analog-digital conversion; Calibration; Crosstalk; Delay; Finite impulse response filter; Frequency; Interpolation; Low pass filters; Oscillators; Timing;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.726588
Filename :
726588
Link To Document :
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