High-Performance Partially Depleted SOI PFETs With In Situ Doped SiGe Raised Source/Drain and Implant-Free Extension

Author

Khakifirooz, Ali ; Cheng, Kangguo ; Cai, Jin ; Kimball, Anne ; Kulkarni, Pranita ; Reznicek, Alexander ; Adam, Thomas ; Edge, Lisa ; Bu, Huiming ; Doris, Bruce ; Shahidi, Ghavam

Author_Institution

IBM Res., Albany, NY, USA

Volume

32

Issue

3

fYear

2011

fDate

3/1/2011 12:00:00 AM

Firstpage

267

Lastpage

269

Abstract

We report partially depleted silicon-on-insulator p-channel field-effect transistors fabricated with a 32-nm technology ground rule and featuring SiGe raised source/drain, SiGe channel, and implant-free extension formation process. A respectable drive current of 950 μA/μm is obtained at an OFF current of 100 nA/μm, V_DD = 1V, and a contacted gate pitch of 130 nm. Furthermore, when the transistor width is scaled down to 100 nm, the saturation transconductance increases by about 15%, leading to a drive current of 1100 μA/μm.

Keywords

Ge-Si alloys; MOSFET; silicon-on-insulator; MOSFET; SiGe; ground rule; implant-free extension; partially depleted SOI p-channel field-effect transistors; raised source-drain; saturation transconductance; silicon-on-insulator; size 32 nm; transistor width; Boron; Junctions; Logic gates; Resistance; Silicon germanium; Strain; Transistors; Epitaxy; metal–oxide–semiconductor field-effect transistor (MOSFET); partially depleted silicon on insulator (PDSOI); raised source/drain (RSD);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2010.2099639

Filename

5706343