DocumentCode :
1441514
Title :
Predicting error rate for microprocessor-based digital architectures through C.E.U. (Code Emulating Upsets) injection
Author :
Velazco, Raoul ; Rezgui, Sana ; Ecoffet, Robert
Author_Institution :
CNRS, Grenoble, France
Volume :
47
Issue :
6
fYear :
2000
fDate :
12/1/2000 12:00:00 AM
Firstpage :
2405
Lastpage :
2411
Abstract :
This paper investigates an approach to study the effects of upsets on the operation of microprocessor-based digital architectures. The method is based on the injection of bit-flips, randomly in time and location by using the capabilities of typical application boards. Experimental results, obtained on programs running on two different digital boards, built around an 80C51 microcontroller and a 320C50 Digital Signal Processor, illustrate the potentialities of this new strategy
Keywords :
digital signal processing chips; ion beam effects; microcontrollers; microprocessor chips; 320C50 digital signal processor; 80C51 microcontroller; bit-flip injection; code emulating upset; digital architecture; error rate; microprocessor; radiation environment; Digital signal processors; Digital systems; Error analysis; Lips; Microcontrollers; Microprocessors; Particle beams; Registers; Single event upset; Testing;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.903784
Filename :
903784
Link To Document :
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