Title :
Front-end readout system for PHENIX RICH
Author :
Tanaka, Y. ; Hara, H. ; Ebisu, K. ; Hibino, M. ; Matsumoto, T. ; Sakaguchi, T. ; Kikuchi, J. ; Wintenberg, A.L. ; Walker, J.W. ; Frank, S. ; Moscone, C. ; Jones, J.P. ; Young, G.R. ; Oyama, K. ; Hamagaki, H.
Author_Institution :
Inst. of Appl. Sci., Nagasaki, Japan
fDate :
12/1/2000 12:00:00 AM
Abstract :
A front-end readout system with a custom backplane and custom circuit modules has been developed for the RICH subsystem of the PHENIX experiment. The design specifications and test results of the backplane and the modules are presented in this paper. In the module design, flexibility for modification is maximized through the use of Complex Programmable Logic Devices. In the backplane design, a source-synchronous bus architecture is adopted for the data and control bus. The transfer speed of the backplane has reached 640 Mbyte/s with a 128-bit data bus. Total transaction time is estimated to be less than 30 μs per event when this system is used in the experiment. This result indicates that the performance satisfies the data-rate requirement of the PHENIX experiment
Keywords :
Cherenkov counters; nuclear electronics; programmable logic devices; readout electronics; 640 Mbyte/s; Complex Programmable Logic Devices; PHENIX RICH; RICH subsystem; custom backplane; custom circuit modules; data-rate requirement; front-end readout system; source-synchronous bus architecture; transaction time; Analog memory; Backplanes; Buffer storage; Circuit testing; Communication system control; Detectors; Electrons; Laboratories; Programmable logic devices; Timing;
Journal_Title :
Nuclear Science, IEEE Transactions on
