Thermal resistance analysis by induced transient (TRAIT) method for power electronic devices thermal characterization. II. Practice and experiments

For pt.I see ibid., vol.13, no.6, p.1208-19 (1998). The TRAIT method for thermal characterization of electronic devices, whose theory was exposed in part I for one-dimensional (1-D) structures, was here applied to systems having heat fluxes with three-dimensional (3-D) dependence in order to demonstrate that the spatial resolution of the thermal resistance analysis is still qualitatively maintained in this type of structure too. The analytical procedure was first applied to simulated structures whose temperature transients and steady-state fields were obtained by means of a finite-element thermal simulation program. In these cases, the knowledge of the steady-state temperature distribution allowed identifying the thermal physical domains which correspond to the cells of the calculated equivalent thermal circuit composed by resistances and capacitances. Furthermore, some experiments on real electronic devices with purposely designed assembling structures were exposed and discussed. The samples were power-integrated circuits with plastic packages mounted on various substrates and Schottky diodes in TO-3 packages. The experiments on both simulated and real devices demonstrated that TRAIT analysis, being able to recognize the localization of some induced defects, maintains its spatial resolution character, despite the large distortion of the thermal domains occurring when the defects are close to the heat source