Title :
A Low-IF/Zero-IF Reconfigurable Analog Baseband IC With an I/Q Imbalance Cancellation Scheme
Author :
Kitsunezuka, Masaki ; Tokairin, Takashi ; Maeda, Tadashi ; Fukaishi, Muneo
Author_Institution :
Syst. IP Core Res. Labs., NEC Corp., Kawasaki, Japan
fDate :
3/1/2011 12:00:00 AM
Abstract :
A low-IF/zero-IF reconfigurable analog baseband IC embodying an automatic I/Q imbalance cancellation scheme is reported. The chip, which comprises a down-conversion mixer, an analog baseband filter, and a programmable gain amplifier, achieves a high image rejection of 55 dB without any calibration. It operates over a wide radio frequency range of 0.4-2.4 GHz, and has a cut-off frequency range of 0.3-30 MHz in zero-intermediate frequency (IF) mode and an IF range of 0.2-6 MHz in low-IF mode. The circuit in the receiver chain draws only 4.5-6.2 mA, and the clock generator including LO buffers draws 1.8-6.3 mA from a 1.2-V supply. The chip, implemented in 90-nm CMOS technology, occupies an area of 1.1 .
Keywords :
CMOS integrated circuits; UHF amplifiers; UHF filters; UHF integrated circuits; UHF mixers; radio receivers; reconfigurable architectures; CMOS technology; I/Q imbalance cancellation scheme; analog baseband filter; clock generator; current 1.8 mA to 6.3 mA; down-conversion mixer; frequency 0.3 MHz to 30 MHz; frequency 0.4 GHz to 2.4 GHz; image rejection; programmable gain amplifier; receiver chain; reconfigurable analog baseband IC; size 90 nm; voltage 1.2 V; Baseband; Clocks; Cutoff frequency; Gain; Mixers; Noise; Receivers; Analog baseband; duty-cycle control; dynamic matching; image rejection; low-IF; reconfigurable filter; software-defined radio; zero-IF;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2010.2102510