Title :
Compact variability modeling to the rescue
Abstract :
This issue of D&T includes five special-issue theme articles on compact variability modeling for nanometer CMOS technology. A sixth, nontheme article surveys the effects and ongoing research of power supply noise.
Keywords :
CMOS process; CMOS technology; Circuit noise; Circuit testing; Delay effects; Electronic design automation and methodology; Manufacturing processes; Materials testing; Semiconductor device modeling; Technological innovation; CMOS technology; compact variability modeling; design and test; nanometer CMOS technology;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2010.40
