Fourth-order cascade SC ΣΔ modulators: a comparative study

Author

Medeiro, Fernando ; Pérez-Verdu, Belén ; Manuel de la Rosa, J. ; Rodríguez-Vázquez, Angel

Author_Institution

Centro Nacional de Microelectron., Inst. de Microelectron. de Sevilla, Spain

Volume

45

Issue

10

fYear

1998

fDate

10/1/1998 12:00:00 AM

Firstpage

1041

Lastpage

1051

Abstract

Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because of their robust, stable operation and their capability to achieve high resolution and wide bandwidth with moderate power consumption. However, their optimum realization requires careful consideration of their performance degradations due to the hardware nonidealities. This paper presents a comparative study of the influence of finite op-amp gain and capacitor mismatch on the performance of fourth-order cascade ΣΔ modulators realized by means of switched-capacitor circuits. It considers single-bit and multibit quantizers and draws a number of comparative remarks validated by time-domain behavioral simulations

Keywords

cascade networks; modulators; sigma-delta modulation; switched capacitor networks; time-domain analysis; ADC; IC implementation; SC sigma-delta modulators; analog sampled-data circuits; capacitor mismatch; finite op-amp gain; fourth-order cascade ΣΔ modulators; high resolution; multibit quantizers; single-bit quantizers; stable operation; switched-capacitor circuits; time-domain behavioral simulations; wide bandwidth; Analog integrated circuits; Bandwidth; Degradation; Energy consumption; Hardware; Operational amplifiers; Performance gain; Robustness; Sampled data circuits; Switched capacitor circuits;

fLanguage

English

Journal_Title

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Publisher

ieee

ISSN

1057-7122

Type

jour

DOI

10.1109/81.728858

Filename

728858