DocumentCode :
1443562
Title :
Power-Management Architecture of the Intel Microarchitecture Code-Named Sandy Bridge
Author :
Rotem, Efraim ; Naveh, Alon ; Rajwan, Doron ; Ananthakrishnan, Avinash ; Weissmann, Eliezer
Volume :
32
Issue :
2
fYear :
2012
Firstpage :
20
Lastpage :
27
Abstract :
Modern microprocessors are evolving into system-on-a-chip designs with high integration levels, catering to ever-shrinking form factors. Portability without compromising performance is a driving market need. An architectural approach that´s adaptive to and cognizant of workload behavior and platform physical constraints is indispensable to meeting these performance and efficiency goals. This article describes power-management innovations introduced on Intel´s Sandy Bridge microprocessor.
Keywords :
microcomputers; system-on-chip; Intel microarchitecture; Intel sandy bridge microprocessor; integration levels; power management architecture; power management innovations; system on a chip designs; Bridge circuits; Bridges; Computer architecture; Graphics; Microprocessors; System-on-a-chip; Voltage control; Sandy Bridge; Turbo Boost; energy management; power management;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2012.12
Filename :
6148200
Link To Document :
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