DocumentCode :
1444195
Title :
On the Robustness of Look-Up Table Digital Predistortion in the Presence of Loop Delay Error
Author :
Liu, You-Jiang ; Lu, Bin ; Cao, Tao ; Zhou, Bang-Hua ; Zhou, Jie ; Liu, Yi-Nong
Author_Institution :
Dept. of Eng. Phys., Tsinghua Univ., Beijing, China
Volume :
59
Issue :
10
fYear :
2012
Firstpage :
2432
Lastpage :
2442
Abstract :
Look-up table (LUT) predistortion is the most promising technique to linearize RF power amplifiers (PAs). Before it can be employed successfully, loop delay errors must be estimated and compensated accurately. In this paper, the effect of loop delay errors on LUT predistortion is analyzed. It is shown that LUTs fluctuations happen to both amplitude and phase tables. Then, a novel loop delay estimation algorithm, with a high degree of robustness and accuracy, is presented. To further improve the robustness of LUT predistortion to loop delay errors, the smoothing filter (SMF) method to polish LUTs fluctuations is proposed here. LUT predistortion can suffer bigger loop delay errors because of the proposed SMF method, but retains good linearization performance close to the optimal one. The performance of the proposed loop delay estimation algorithm is investigated by comparative study with a state-of-the-art algorithm. Its robustness is also demonstrated under a noisy feedback path by simulations. The effectiveness of the SMF method is assessed by both simulations and experiments. Comparison among different predistortion systems is also presented. The results clearly show that the proposed techniques are useful for LUT predistortion.
Keywords :
delay estimation; distortion; power amplifiers; smoothing methods; table lookup; RF power amplifiers; amplitude table; look-up table digital predistortion; loop delay error; loop delay estimation algorithm; noisy feedback path; phase table; smoothing filter method; Delay estimation; Indexes; Interpolation; Multiaccess communication; Predistortion; Table lookup; Digital predistortion (DPD); linearization techniques; look-up table (LUT); loop delay; power amplifiers (PAs);
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2012.2185332
Filename :
6148314
Link To Document :
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