• DocumentCode
    1444297
  • Title

    SKB-Tree: A Fixed-Outline Driven Representation for Modern Floorplanning Problems

  • Author

    Lin, Jai-Ming ; Hung, Zhi-Xiong

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
  • Volume
    20
  • Issue
    3
  • fYear
    2012
  • fDate
    3/1/2012 12:00:00 AM
  • Firstpage
    473
  • Lastpage
    484
  • Abstract
    In this paper, we propose an SKB-tree representation for two modern floorplaning problems: fixed-outline and voltage-island driven floorplanning. Since SKB-tree can dynamically allocate regions for blocks so that all blocks can be placed into a specific outline for each solution, it is a suitable representation for dealing with the fixed-outline constraint. Due to this good property, we also use it to deal with the voltage-island driven floorplanning. Different from previous works, we constrain blocks of the same voltage to be placed into one region to save power routing resource, simplify power planning, and reduce IR Drop. Experimental results show the feasibility of SKB-tree. For the fixed-outline constraint with zero deadspace, SKB-tree achieved significantly better wirelength than A-FP, Parquet 4.0, ZDS, and SAFFOA. SKB-tree can get better results than other fixed-outline driven floorplanners because it only needs to focus on wirelength optimization during simulated annealing. Besides, for voltage island driven floorplanning, SKB-tree also consumes less power and wirelength.
  • Keywords
    circuit optimisation; integrated circuit layout; network routing; simulated annealing; trees (mathematics); IR drop; SKB Tree; fixed outline; modern floorplanning problems; power routing resource; simplify power planning; simulated annealing; voltage island driven floorplanning; wirelength optimization; Complexity theory; Cost function; Markov processes; Planning; Routing; Shape; Simulated annealing; Fixed-outline; floorplanning; multiple supply voltage; voltage island;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2011.2104983
  • Filename
    5710024