DocumentCode :
1444566
Title :
Fault location in cutpoint cellular arrays
Author :
Kodandapani, K.L. ; Swamy, M. E Sowmitri
Author_Institution :
University of Regina, Department of Computer Science, Regina, Canada
Volume :
123
Issue :
6
fYear :
1976
fDate :
6/1/1976 12:00:00 AM
Firstpage :
515
Lastpage :
516
Abstract :
A systematic procedure to locate a faulty cell in a column (row) of the main array (rotated array) in cutpoint cellular arrays is presented. It is assumed that a cell failure may be due to stuck-at faults at the input/output leads of the cell or due to stuck-at faults within the cell.
Keywords :
cellular arrays; fault location; logic testing; cell failure; cutpoint cellular arrays; fault location;
fLanguage :
English
Journal_Title :
Electrical Engineers, Proceedings of the Institution of
Publisher :
iet
ISSN :
0020-3270
Type :
jour
DOI :
10.1049/piee.1976.0117
Filename :
5253745
Link To Document :
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