• DocumentCode
    1445629
  • Title

    Programmable neural logic

  • Author

    Bohossian, Vasken ; Hasler, Paul ; Bruck, Jehoshua

  • Author_Institution
    Department of Electrical Engineering, California Institute of Technology, Pasadena, CA 91125-0001 USA
  • Volume
    21
  • Issue
    4
  • fYear
    1998
  • Firstpage
    346
  • Lastpage
    351
  • Abstract
    Circuits of threshold elements (Boolean input, Boolean output neurons) have been shown to be surprisingly powerful. Useful functions such as XOR, ADD and MULTIPLY can be implemented by such circuits more efficiently than by traditional AND/OR circuits. In view of that, we have designed and built a programmable threshold element. The weights are stored on polysilicon floating gates, providing long-term retention without refresh. The weight value is increased using tunneling and decreased via hot electron injection. A weight is stored on a single transistor allowing the development of dense arrays of threshold elements. A 16-input programmable neuron was fabricated in the standard 2 μm double-poly, analog process available from MOSIS. We also designed and fabricated the multiple threshold element introduced in [5]. It presents the advantage of reducing the area of the layout from O(n2) to O(n), (n being the number of variables) for a broad class of Boolean functions, in particular symmetric Boolean functions such as PARITY. A long term goal of this research is to incorporate programmable single/multiple threshold elements, as building blocks in field programmable gate arrays.
  • Keywords
    electroless deposition; flip-chip devices; integrated circuit reliability; lead alloys; soldering; tin alloys; NiP-Au; PbSn; deposition technology; diameter distribution; maskless bump process; nucleation conditions; printed wiring boards; pulse amplitude; pulse length; reliability tests; solder bumps; solder droplets; underfill; wettable bond-pad metallizations; Degradation; Glass; Metallization; Piezoelectric actuators; Production equipment; Rough surfaces; Sputtering; Surface roughness; Wafer bonding; Zinc; Boolean functions; circuit complexity; digital logic; floating gate; hot electron injection; threshold logic; tunneling;
  • fLanguage
    English
  • Journal_Title
    Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1070-9894
  • Type

    jour

  • DOI
    10.1109/96.730418
  • Filename
    730418