• DocumentCode
    1446032
  • Title

    Iterative Probabilistic Performance Prediction for Multi-Application Multiprocessor Systems

  • Author

    Kumar, Akash ; Mesman, Bart ; Corporaal, Henk ; Ha, Yajun

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore
  • Volume
    29
  • Issue
    4
  • fYear
    2010
  • fDate
    4/1/2010 12:00:00 AM
  • Firstpage
    538
  • Lastpage
    551
  • Abstract
    Modern embedded devices are increasingly becoming multiprocessor with the need to support a large number of applications to satisfy the demands of users. Due to a huge number of possible combinations of these multiple applications, it becomes a challenge to predict their performance. This becomes even more important when applications may be dynamically started and stopped in the system. Since modern embedded systems allow users to download and add applications at run-time, a complete design-time analysis is not always possible. This paper presents a new technique to accurately predict the performance of multiple applications mapped on a multiprocessor platform. Iterative probabilistic analysis is used to estimate the time spent by tasks during their contention phase, and thereby predicting the performance of applications. The approach is scalable with the number of applications and processors in the system. As compared to earlier techniques, this approach is much faster and scalable, while still improving the accuracy. The analysis takes 300 ¿s on a 500 MHz processor for ten applications. Since multimedia applications are increasingly becoming more dynamic, results of a case-study with applications with varying execution times are also presented. In addition, results of a case-study with real applications executing on a field-programmable gate array multiprocessor platform are shown.
  • Keywords
    embedded systems; field programmable gate arrays; iterative methods; multiprocessing systems; probability; embedded devices; embedded systems; field-programmable gate array; iterative probabilistic performance prediction; multiapplication multiprocessor systems; multimedia applications; Application software; Embedded system; Field programmable gate arrays; Flow graphs; Hardware; Mobile handsets; Multiprocessing systems; Performance analysis; Phase estimation; Runtime; Heterogeneous multiprocessor; multiple applications; non-preemption; performance prediction; synchronous data flow graphs;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2010.2042887
  • Filename
    5433755