DocumentCode :
1446116
Title :
Practical approach to asynchronous gate networks
Author :
Brzozowski, J.A. ; Yoeli, M.
Author_Institution :
University of Waterloo, Department of Computer Science, Waterloo, Canada
Volume :
123
Issue :
6
fYear :
1976
fDate :
6/1/1976 12:00:00 AM
Firstpage :
495
Lastpage :
498
Abstract :
In analysing sequential gate networks one must take into account the propagation delay of each gate. In conventional methods, state variables are associated with feedback loops, and a flow table based on these variables is constructed. This flow table may be incorrect if hazards are present, and an additional complex analysis is required to obtain the correct behaviour. In this paper, we describe a model in which a state variable is associated with each gate. This leads to a conceptually simple one-pass analysis procedure. The model is applied to the analysis of complex commercial flip-flops.
Keywords :
asynchronous sequential logic; logic design; logic gates; asynchronous gate networks; flow table; practical approach; propagation delay; sequential gate networks; state variable;
fLanguage :
English
Journal_Title :
Electrical Engineers, Proceedings of the Institution of
Publisher :
iet
ISSN :
0020-3270
Type :
jour
DOI :
10.1049/piee.1976.0113
Filename :
5253992
Link To Document :
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