• DocumentCode
    1446723
  • Title

    Economic Analysis of the HOY Wireless Test Methodology

  • Author

    Hsing, Yu-Tsao ; Denq, Li-Ming ; Chen, Chao-Hsun ; Wu, Cheng-Wen

  • Author_Institution
    Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • Volume
    27
  • Issue
    3
  • fYear
    2010
  • Firstpage
    20
  • Lastpage
    30
  • Abstract
    The HOY (Hypothesis, Odyssey, and Yield) test system provides wireless test access and embedded DFT, while offering lower cost and better performance than conventional ATE. This article briefly describes HOY, then proposes a test cost model to compare it with conventional ATE, and analyzes the test cost of these two methods for different manufacturing processes, area overheads, die sizes, manufacturing volumes, and test times.
  • Keywords
    integrated circuit testing; semiconductor device manufacture; HOY wireless test methodology; area overheads; die sizes; economic analysis; manufacturing processes; manufacturing volumes; test cost model; test times; wireless test access; DFT; HOY; cost estimation; design and test; test cost model; wireless testing;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2009.96
  • Filename
    5255193