Quadrature bandpass ΔΣ modulation for digital radio

Author

Jantzi, Stephen A. ; Martin, Kenneth W. ; Sedra, Adel S.

Author_Institution

Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada

Volume

32

Issue

12

fYear

1997

fDate

12/1/1997 12:00:00 AM

Firstpage

1935

Lastpage

1950

Abstract

A quadrature bandpass ΔΣ modulator IC facilitates monolithic digital-radio-receiver design by allowing straightforward “complex A/D conversion” of an image reject mixer´s I and Q, outputs. Quadrature bandpass ΔΣ modulators provide superior performance over pairs of real bandpass ΔΣ modulators in the conversion of complex input signals, using complex filtering embedded in ΔΣ loops to efficiently realize asymmetric noise-shaped spectra. The fourth-order prototype IC, clocked at 10 MHz, converts narrowband 3.75-MHz I and Q inputs and attains a dynamic range of 67 dB in 200-kHz (GSM) bandwidth, increasing to 71 and 77 dB in 100- and 30-kHz bandwidths, respectively. Maximum signal-to-noise plus distortion ratio (SNDR) in 200-kHz bandwidth is 62 dB. Power consumption is 130 mW at 5 V. Die size in a 0.8-μm CMOS process is 2.4×1.8 mm²

Keywords

CMOS integrated circuits; digital radio; mixed analogue-digital integrated circuits; modulators; radio receivers; sigma-delta modulation; switched capacitor networks; ΔΣ modulator IC; 0.8 micron; 10 MHz; 130 mW; 3.75 MHz; 30 to 200 kHz; 5 V; A/D conversion; ADC; CMOS process; I output; Q output; asymmetric noise-shaped spectra; complex filtering; complex input signals; digital radio; fourth-order prototype IC; image reject mixer; monolithic digital-radio-receiver design; quadrature bandpass ΔΣ modulation; Band pass filters; Bandwidth; Delta modulation; Digital communication; Digital integrated circuits; Digital modulation; Filtering; Image converters; Integrated circuit noise; Monolithic integrated circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.643651

Filename

643651