DocumentCode :
1447769
Title :
Charge-sharing alleviation and detection for CMOS domino circuits
Author :
Chang, Shih-Chieh ; Cheng, Ching-Hwa ; Jone, Wen-Ben ; De Lee, Shin ; Wang, Jinn-Shyan
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Taiwan, China
Volume :
20
Issue :
2
fYear :
2001
fDate :
2/1/2001 12:00:00 AM
Firstpage :
266
Lastpage :
280
Abstract :
Charge sharing, which occurs in any complementary metal-oxide-semiconductor (CMOS) domino gate, may degrade the output voltage level or may even cause an erroneous output value. In this paper, this problem is thoroughly investigated by considering circuit topology and circuit function. We describe a method to measure the sensitivity [called charge-sharing (CS) vulnerability] of the CS problem for each domino gate. A method to derive the CS vulnerability and the test vector for each domino gate is suggested. We also propose a transistor reordering method to dramatically reduce the CS vulnerabilities for all domino gates so that the CS problem can be alleviated. We also prove theoretically that a set of test vectors generated for single charge-sharing faults (SCSFs) can also detect all multiple charge-sharing faults (MCSFs). This good property significantly guarantees the test quality for the CS faults of domino circuits
Keywords :
CMOS logic circuits; fault diagnosis; logic gates; logic testing; CMOS domino circuits; charge-sharing alleviation; charge-sharing faults; circuit function; circuit topology; erroneous output value; output voltage level; test quality; test vector; transistor reordering method; CMOS logic circuits; Capacitance; Circuit faults; Circuit testing; Circuit topology; Clocks; Computer science; Current measurement; Degradation; Voltage;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.908469
Filename :
908469
Link To Document :
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