DocumentCode :
1448579
Title :
Application of the Underfill Model to Bump Arrangement and Dispensing Process Design
Author :
Peng, Sin-Wei ; Young, Wen-Bin
Author_Institution :
Dept. of Aeronaut. & Astronaut., Nat. Cheng-Kung Univ., Tainan, Taiwan
Volume :
33
Issue :
2
fYear :
2010
fDate :
4/1/2010 12:00:00 AM
Firstpage :
122
Lastpage :
128
Abstract :
Along with the technology advance, the applications of flip chip have the tendency toward lower profile, lighter weight, and higher density. Due to the mismatch of the coefficients of thermal expansion (CTE) between the chip and substrate, the solder joints tend to fail under high thermal stresses. In order to enhance the reliability of the solder joints, underfill encapsulation is filled into the gap between the chip and substrate around the solder joints by capillary force. It is crucial for flip-chip technology to speed up the encapsulation process and avoid the formation of voids at the same time. A finite-element model was developed to simulate the underfill flow in our laboratory. In this paper, further verification of the underfill model is performed to confirm its feasibility. A model is proposed to design an efficient process for encapsulant dispensing based on the underfill model. Application of the model is also conducted to investigate the effect of different bump designs on the dispensing process.
Keywords :
encapsulation; finite element analysis; flip-chip devices; reliability; solders; thermal expansion; thermal stresses; bump arrangement; capillary force; dispensing process design; finite element model; flip-chip technology; reliability; solder joints; substrate; thermal expansion coefficients; thermal stresses; underfill encapsulation; Bump pitch; capillary flow; edge effect; flip chip encapsulation; underfill;
fLanguage :
English
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-334X
Type :
jour
DOI :
10.1109/TEPM.2010.2044648
Filename :
5437210
Link To Document :
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