DocumentCode :
1448856
Title :
Corrections to “A Discrete-Time Model for the Design of Type-II PLLs With Passive Sampled Loop Filters” [Feb 11 264-275]
Volume :
59
Issue :
3
fYear :
2012
fDate :
3/1/2012 12:00:00 AM
Firstpage :
673
Lastpage :
673
Abstract :
Through no fault of the authors, several typesetting errors were made in the final production of the above titled paper (ibid., vol. 58, no. 2, pp.264-275, Feb. 2012). The corrections of these errors are presented here.
Keywords :
Passive filters; Phase locked loops;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2012.2185186
Filename :
6152175
Link To Document :
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