DocumentCode
1448871
Title
A High-Frequency Clock Distribution Network Using Inductively Loaded Standing-Wave Oscillators
Author
Sasaki, Mamoru
Author_Institution
Hiroshima Univ., Higashi-Hiroshima, Japan
Volume
44
Issue
10
fYear
2009
Firstpage
2800
Lastpage
2807
Abstract
The present paper introduces a resonant clock generation and distribution scheme that uses uniform amplitude and uniform phase standing wave oscillators in order to distribute a high-frequency clock signal with low skew, low jitter, and low power. A suitable distributed resonator for a global clock distribution that is inductively loaded transmission line generating a uniform amplitude and uniform phase standing wave is realized through detailed analysis of a standing wave on a loaded transmission line. A test chip is fabricated using 0.18-mum 6 M CMOS technology, and a cascaded distribution network is implemented for a global clock distribution with a space-filling curve. Furthermore, distributed local LC tanks are implemented as local resonant clock networks, which are composed of parasitic capacitors and small spiral inductors. The distributed local LC tanks are driven by a fine clock distributed with cascaded standing-wave oscillators and reduce the primary power in the clock distribution, which is dissipated as dynamic power in the parasitic capacitance of latches and/or flip flops. The measurement results reveal that, at 9.4 GHz, the peak-to-peak jitter is 5.2 ps and the clock skew is 0.8 ps, and the global and local distributions dissipated only 17% and 23% of CV2 f power, respectively.
Keywords
CMOS digital integrated circuits; clocks; flip-flops; CMOS technology; distributed local LC tanks; flip flops; frequency 9.4 GHz; global clock distribution; high-frequency clock distribution network; inductively loaded standing-wave oscillators; latches; local resonant clock networks; parasitic capacitance; parasitic capacitors; size 0.18 mum; space-filling curve; spiral inductors; time 5.2 ps; uniform amplitude; uniform phase standing wave oscillators; CMOS technology; Clocks; Distributed power generation; Jitter; Oscillators; Power generation; Power transmission lines; Resonance; Signal generators; Testing; Clock distribution; distributed $LC$ tanks; distributed oscillators; inductive load; resonant clocking; standing wave;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2009.2027541
Filename
5256965
Link To Document