Title :
High-Speed Optical Receivers With Integrated Photodiode in 130 nm CMOS
Author :
Tavernier, Filip ; Steyaert, Michel S J
Author_Institution :
Dept. Elektrotechniek, Katholieke Univ. Leuven, Heverlee, Belgium
Abstract :
The design and measurement of two optical receivers with integrated photodiode in 130 nm CMOS is presented. The low bandwidth, which is typical for photodiodes in CMOS technologies, is circumvented by a differential photodiode topology on the one hand and by including an optimized equalizer in the receiver chain on the other hand. The low responsivity of a CMOS photodiode is compensated by a very low-noise design for the differential TIA. The disadvantage of such a low-noise design is its high power consumption. Therefore, a design strategy is presented where part of the circuit is biased in weak inversion. Doing so, the power consumption is decreased from 138 mW for the standard design to only 74.16 mW. Both designs are measured optically with 850 nm modulated light and are able to operate at 4.5 Gbit/s with a BER lower than 10-12. The sensitivities for this BER and speed are - 3.8 dBm and -3.4 dBm respectively. The receivers even work up to 5 Gbit/s for BER values around 10-9.
Keywords :
CMOS analogue integrated circuits; data communication; differential amplifiers; high-speed optical techniques; integrated optoelectronics; low noise amplifiers; optical modulation; optical receivers; photodiodes; CMOS analog integrated circuit; CMOS technology; bit rate 4.5 Gbit/s; data communication; differential TIA; high-speed optical receiver; integrated photodiode; light modulation; low-noise design; size 130 nm; wavelength 850 nm; Bandwidth; Bit error rate; CMOS technology; Energy consumption; Equalizers; Optical design; Optical modulation; Optical receivers; Photodiodes; Topology; Amplifiers; CMOS analog integrated circuits; data communication; equalizers; optical communication; optical receivers; photodiodes;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2009.2028755
