DocumentCode
1449030
Title
Comparison of 4T and 6T FinFET SRAM Cells for Subthreshold Operation Considering Variability—A Model-Based Approach
Author
Fan, Ming-Long ; Wu, Yu-Sheng ; Hu, Vita Pi-Ho ; Hsieh, Chien-Yu ; Su, Pin ; Chuang, Ching-Te
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
58
Issue
3
fYear
2011
fDate
3/1/2011 12:00:00 AM
Firstpage
609
Lastpage
616
Abstract
This paper investigates the cell stability of recently introduced four-transistor (4T) and conventional six-transistor (6T) fin-shaped field-effect transistor static random access memory (SRAM) cells operating in a subthreshold region using an efficient model-based approach to consider the impact of device variations. Compared with the 6T cell, this paper indicates that 4T SRAM cells exhibit a better nominal READ static noise margin (RSNM) because of the reduced READ disturb. For 4T cells, the nearly ideal values of Vwrite,0 and Vwriet,1 guarantee the positive nominal WRITE static noise margin (WSNM) for selected cells. For half-selected cells on the selected bit line, a sufficient margin is observed between WRITE time (for selected cells) and WRITE disturb (for half-selected cells). Using the established model-based approach, the variability of subthreshold 6T and 4T SRAM cells is assessed with 1000 samples. Our results indicate that the 4T driverless cell with a larger μRSNM and a slightly worse σ-RSNM shows a comparable μ/σ ratio in RSNM with the 6T cell. Further more, for a given cell area, 4T SRAM cells using relaxed device dimensions with reduced σ-RSNM can outperform the 6T cell. For WRITE operation, 4T SRAM cells exhibit a superior WSNM, whereas the design margin between WRITE time and WRITE disturb needs to be carefully examined to ensure an adequate margin considering device variability.
Keywords
MOSFET; SRAM chips; semiconductor device noise; 4T FinFET SRAM cell; 6T FinFET SRAM cell; READ disturb; READ static noise margin; WRITE static noise margin; cell stability; device variation; four-transistor fin-shaped field-effect transistor; six-transistor fin-shaped field-effect transistor; static random access memory cells; subthreshold operation; Analytical models; Computational modeling; FinFETs; Logic gates; Random access memory; Stability analysis; Fin-shaped field-effect transistor (FinFET); static noise margin (SNM); subthreshold static random access memory (SRAM); variability;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2010.2096225
Filename
5712181
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