A CMOS 6-b, 400-MSample/s ADC with error correction

Author

Tsukamoto, Sanroku ; Schofield, William G. ; Endo, Toshiaki

Author_Institution

Fujitsu VLSI Ltd., Aichi, Japan

Volume

33

Issue

12

fYear

1998

fDate

12/1/1998 12:00:00 AM

Firstpage

1939

Lastpage

1947

Abstract

A CMOS 6-bit 400-MSample/s (MS/s) flash analog/digital converter (ADC) using an additional comparator for background autozeroing has been developed. Additionally, an error-correction technique detects and corrects errors after thermometer code zero-to-one transition detection, improving the error rate from 10E-4 to 10E-8 at 400 MS/s with a 200-MHz analog input. This ADC was fabricated in a single-poly, double-metal, 0.35-μm CMOS technology and occupies 1.6×0.75 mm. The power consumption is 190 mW at 400 MS/s with 3.0 V power supply. This ADC has a two-clock cycle latency

Keywords

CMOS integrated circuits; analogue-digital conversion; comparators (circuits); error correction; error detection; 0.35 micron; 190 mW; 3 V; 6 bit; CMOS ADC; background autozeroing; comparator; error correction; error rate improvement; flash analog/digital converter; single-poly double-metal CMOS technology; thermometer code zero-to-one transition detection; two-clock cycle latency; Analog-digital conversion; CMOS technology; Choppers; Costs; Delay; Encoding; Error analysis; Error correction; Error correction codes; Integrated circuit technology;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.735534

Filename

735534