DocumentCode :
1449807
Title :
Fractal capacitors
Author :
Samavati, Hirad ; Hajimiri, Ali ; Shahani, Arvin R. ; Nasserbakht, Gitty N. ; Lee, Thomas H.
Author_Institution :
Stanford Univ., CA, USA
Volume :
33
Issue :
12
fYear :
1998
fDate :
12/1/1998 12:00:00 AM
Firstpage :
2035
Lastpage :
2041
Abstract :
A linear capacitor structure using fractal geometries is described. This capacitor exploits both lateral and vertical electric fields to increase the capacitance per unit area. Compared to standard parallel-plate capacitors, the parasitic bottom-plate capacitance is reduced. Unlike conventional metal-to-metal capacitors, the capacitance density increases with technology scaling. A classic fractal structure is implemented with 0.6-μm metal spacing, and a factor of 2.3 increase in the capacitance per unit area is observed. It is shown that capacitance boost factors in excess of ten may be possible as technology continues to scale. A computer-aided-design tool to automatically generate and analyze custom fractal layouts has been developed
Keywords :
CAD; capacitors; fractals; capacitance boost factor; capacitance density; computer aided design; fractal structure; lateral electric field; linear capacitor; parasitic bottom plate capacitance; vertical electric field; Application software; Application specific integrated circuits; Fractals; Geometry; MIM capacitors; Parasitic capacitance; Q factor; Radio frequency; Switching circuits; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.735545
Filename :
735545
Link To Document :
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