DocumentCode :
1449859
Title :
A 256×256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output
Author :
Decker, Steven ; McGrath, R. Daniel ; Brehmer, Kevin ; Sodini, Charles G.
Author_Institution :
MIT, Cambridge, MA, USA
Volume :
33
Issue :
12
fYear :
1998
fDate :
12/1/1998 12:00:00 AM
Firstpage :
2081
Lastpage :
2091
Abstract :
A stepped reset-gate voltage technique is applied to a CMOS active pixel sensor array to increase dynamic range by 26 dB. A frame rate of 390 frames/s is achieved using column-parallel output circuits. Switched-capacitor correlated double-sampling circuits reduce fixed-pattern noise to 4.0 mV (dark). Cyclic analog-to-digital converters achieve approximately 9-b accuracy. At 30 frames/s, random noise is 0.56 mV (dark), optical dynamic range is 96 dB, and power is 52 mW
Keywords :
CMOS image sensors; analogue-digital conversion; integrated circuit noise; random noise; smart pixels; switched capacitor networks; 256 pixel; 52 mW; 65536 pixel; CMOS imaging array; SC correlated double-sampling circuits; active pixel sensor array; analog-to-digital converters; column-parallel digital output; cyclic ADCs; fixed-pattern noise reduction; stepped reset-gate voltage technique; switched-capacitor sampling circuits; wide dynamic range pixels; CMOS image sensors; Circuit noise; Dynamic range; Noise reduction; Optical imaging; Optical noise; Pixel; Sensor arrays; Switching circuits; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.735551
Filename :
735551
Link To Document :
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