A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier

Author

Tanabe, Akira ; Soda, Masaaki ; Nakahara, Yasushi ; Tamura, Takao ; Yoshida, Kazuyoshi ; Furukawa, Akio

Author_Institution

Ultra-LSI Res. Lab., NEC Corp., Sagamihara, Japan

Volume

33

Issue

12

fYear

1998

fDate

12/1/1998 12:00:00 AM

Firstpage

2148

Lastpage

2153

Abstract

A single-chip 2.4-Gb/s CMOS optical-receiver IC has been realized for the first time using 0.15-μm gate bulk CMOS. The chip integrates a preamplifier, an automatic gain control, a phase-locked loop, and a 1:8 demultiplexer. This circuit has achieved a low power consumption of 104 mW (at 2.4 Gb/s, V_DD=2 V), which is much smaller than that of conventional GaAs field-effect transistors and Si bipolar IC´s. The design methodology to reduce digital-to-analog substrate cross-talk noise is discussed. Using this methodology, a low-cross-talk sensitive preamplifier circuit with a 5.9 GHz bandwidth and a 59-dBΩ gain has been developed and integrated into a single-chip receiver IC

Keywords

CMOS integrated circuits; automatic gain control; demultiplexing equipment; integrated circuit noise; optical crosstalk; optical receivers; phase locked loops; preamplifiers; substrates; 0.15 micron; 104 mW; 2 V; 2.4 Gbit/s; 5.9 GHz; automatic gain control; demultiplexer; digital-to-analog substrate crosstalk noise; phase locked loop; power consumption; preamplifier circuit; single chip CMOS optical receiver IC; CMOS integrated circuits; Energy consumption; Gain control; Gallium arsenide; Optical crosstalk; Optical receivers; Optical sensors; Phase locked loops; Photonic integrated circuits; Preamplifiers;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.735558

Filename

735558