• DocumentCode
    1450463
  • Title

    A 4 kb Metal-Fuse OTP-ROM Macro Featuring a 2 V Programmable 1.37 \\mu m ^{2}

  • Author

    Kulkarni, Sarvesh H. ; Chen, Zhanping ; He, Jun ; Jiang, Lei ; Pedersen, M. Brian ; Zhang, Kevin

  • Author_Institution
    Intel Corp., Hillsboro, OR, USA
  • Volume
    45
  • Issue
    4
  • fYear
    2010
  • fDate
    4/1/2010 12:00:00 AM
  • Firstpage
    863
  • Lastpage
    868
  • Abstract
    A 4 kb high-density PROM array featuring the first high-volume manufacturable metal-fuse technology in 32 nm high-k metal-gate CMOS is introduced. In contrast to traditional salicided polysilicon based 2-D fuse cells, the metal-fuse technology enables a 3-D cell topology with program device and fuse element stacked on each other, achieving a 1.37 μm2 cell footprint. The 128-row by 32-column array with an asymmetric tunable static sense scheme can operate down to 0.5 V and provides multi-bit programming capability. Programming success using a 2 V-1 μs pulse condition is demonstrated. The technology is scalable and maintains full compatibility with modern high-k metal-gate processes.
  • Keywords
    CMOS digital integrated circuits; PROM; network topology; 3-D cell topology; high-density PROM array; metal-fuse OTP-ROM; metal-gate CMOS; one-time-programmable ROM; programmable 1T1R bit cell; size 32 nm; voltage 2 V; CMOS technology; Circuit testing; Fuses; Helium; High K dielectric materials; High-K gate dielectrics; Manufacturing; PROM; Read only memory; Silicides; High-density PROM; metal fuse; one-time-programmable ROM (OTP-ROM);
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2010.2040115
  • Filename
    5437478
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1450463