A new timing recovery method for DTV receivers

Author

Bao, J. ; Lu, C.Y. ; Da Graca, P. ; Zeng, S. ; Poon, T.

Author_Institution

Adv. Television Lab, Mitsubishi Electr. ITA, New Providence, NJ, USA

Volume

44

Issue

4

fYear

1998

fDate

11/1/1998 12:00:00 AM

Firstpage

1243

Lastpage

1249

Abstract

We report a new unsynchronized timing recovery method designed for receiving digital TV signals modulated in 256QAM, QPSK and VSB format. The new method includes a simplified and efficient interpolator design, and fast converging PLL. It can be used for fixed rate as well as variable rate applications. The algorithm was developed using SPW, and implemented using an FPGA-based prototype board using real data

Keywords

digital phase locked loops; digital television; field programmable gate arrays; interpolation; quadrature amplitude modulation; quadrature phase shift keying; synchronisation; television receivers; 256QAM; DTV receivers; FPGA-based prototype board; QPSK; SPW; VSB; digital TV signals; fast converging PLL; fixed rate application; interpolator design; timing recovery method; unsynchronized timing recovery method; variable rate application; Circuits; Clocks; Design methodology; Digital TV; Finite impulse response filter; Phase locked loops; Sampling methods; Signal design; Signal processing algorithms; Timing;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.735823

Filename

735823