Title :
Parallel canonical recoding
Author_Institution :
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
fDate :
10/24/1996 12:00:00 AM
Abstract :
The author introduces a parallel algorithm for generating the canonical signed-digit expansion of an n-bit number in O(log n) time using O(n) gates. The algorithm is similar to the computation of the carries in a carry look-ahead circuit. It is also proven that if the binary number x+[x/2] is given, then the canonical signed-digit recoding of x can be computed in O(1) time using O(n) gates
Keywords :
arithmetic codes; digital arithmetic; parallel algorithms; canonical signed-digit expansion; parallel algorithm; parallel canonical recoding;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19961402
